[IA64] Remove IA64_GUEST_CONTEXT_RBS_OFFSET

Pass the offset in the vcpu_reg struct.
Fix displaying stack register in xenctx.

Signed-off-by: Tristan Gingold <tgingold@free.fr>

diff --git a/tools/xentrace/xenctx.c b/tools/xentrace/xenctx.c
index 7861d11cd1a32296ed3361190ed063f03a739168..274da0b41b29dd446130dafe085a0d6c0d0b7922 100644 (file)
--- a/tools/xentrace/xenctx.c
+++ b/tools/xentrace/xenctx.c
@@ -335,7 +335,7 @@ void print_ctx(vcpu_guest_context_t *ctx)
     struct vcpu_guest_context_regs *regs = &ctx->regs;
     struct vcpu_tr_regs *tr = &ctx->regs.tr;
     int i;
-    unsigned int rbs_size;
+    unsigned int rbs_size, cfm_sof;
 
     printf(" ip:  %016lx  ", regs->ip);
     print_symbol(regs->ip);
@@ -485,15 +485,18 @@ void print_ctx(vcpu_guest_context_t *ctx)
 
     printf("\n");
     rbs_size = (regs->ar.bsp - regs->ar.bspstore) / 8;
-    for (i = 0; i < (regs->cfm & CFM_SOF_MASK); i++) {
-        unsigned int rbs_off = (((64 - (rbs_size % 64) - i)) / 64) + i;
+    cfm_sof = (regs->cfm & CFM_SOF_MASK);
+    for (i = 0; i < cfm_sof; i++) {
+        int off = cfm_sof - i;
+        unsigned int rbs_off =
+            (((62 - ((rbs_size + regs->rbs_voff) % 64) + off)) / 63) + off;
         if (rbs_off > rbs_size)
             break;
         printf(" r%02d: %016lx%s", 32 + i,
                regs->rbs[rbs_size - rbs_off],
                (i % 3) != 2 ? "  " : "\n");
     }
-    if (i && (i % 3) != 2)
+    if ((i % 3) != 0)
         printf ("\n");
 
     if (disp_tlb) {

diff --git a/xen/arch/ia64/xen/domain.c b/xen/arch/ia64/xen/domain.c
index c9bd12d432421f87f62b6e277b737132897649a9..83f4472a23dadb362488eb904914ff14ab2e8497 100644 (file)
--- a/xen/arch/ia64/xen/domain.c
+++ b/xen/arch/ia64/xen/domain.c
@@ -361,10 +361,6 @@ void startup_cpu_idle_loop(void)
 # error "XMAPPEDREGS_SHIFT doesn't match sizeof(mapped_regs_t)."
 #endif
 
-#if (IA64_RBS_OFFSET % 512) != IA64_GUEST_CONTEXT_RBS_OFFSET
-# error "arch-ia64.h: IA64_GUEST_CONTEXT_RBS_OFFSET must be adjusted."
-#endif
-
 void hlt_timer_fn(void *data)
 {
        struct vcpu *v = data;
@@ -689,8 +685,9 @@ void arch_get_info_guest(struct vcpu *v, vcpu_guest_context_u c)
        /* FIXME: to be reordered.  */
        c.nat->regs.nats = uregs->eml_unat;
 
+       c.nat->regs.rbs_voff = (IA64_RBS_OFFSET / 8) % 64;
        if (rbs_size < sizeof (c.nat->regs.rbs))
-               memcpy (c.nat->regs.rbs, (char *)v + IA64_RBS_OFFSET, rbs_size);
+               memcpy(c.nat->regs.rbs, (char *)v + IA64_RBS_OFFSET, rbs_size);
 
        c.nat->privregs_pfn = get_gpfn_from_mfn
                (virt_to_maddr(v->arch.privregs) >> PAGE_SHIFT);
@@ -777,7 +774,7 @@ int arch_set_info_guest(struct vcpu *v, vcpu_guest_context_u c)
        if (!was_initialised)
                uregs->loadrs = (rbs_size) << 16;
        if (rbs_size == (uregs->loadrs >> 16))
-               memcpy ((char *)v + IA64_RBS_OFFSET, c.nat->regs.rbs, rbs_size);
+               memcpy((char *)v + IA64_RBS_OFFSET, c.nat->regs.rbs, rbs_size);
 
        uregs->r1 = c.nat->regs.r[1];
        uregs->r12 = c.nat->regs.r[12];

diff --git a/xen/include/public/arch-ia64.h b/xen/include/public/arch-ia64.h
index f8f462b004fad572f9d8f6449ac8cb97bfd17afe..c55fb47eada09f9a82824dca5adc1e930e5d535b 100644 (file)
--- a/xen/include/public/arch-ia64.h
+++ b/xen/include/public/arch-ia64.h
@@ -470,17 +470,24 @@ struct vcpu_guest_context_regs {
 
         struct vcpu_tr_regs tr;
 
+        /* Physical registers in case of debug event.  */
+        unsigned long excp_iipa;
+        unsigned long excp_isr;
+        unsigned int excp_vector;
+
         /*
          * The rbs is intended to be the image of the stacked registers still
          * in the cpu (not yet stored in memory).  It is laid out as if it
-         * were written in memory at an 512 (64*8) * aligned address + offset.
-         * The offset is IA64_RBS_OFFSET % 512.
-         * rbs_nat contains NaT bits for the remaining rbs registers.
+         * were written in memory at a 512 (64*8) aligned address + offset.
+         * rbs_voff is (offset / 8).  rbs_nat contains NaT bits for the
+         * remaining rbs registers.  rbs_rnat contains NaT bits for in memory
+         * rbs registers.
+         * Note: loadrs is 2**14 bytes == 2**11 slots.
          */
-        /* Note: loadrs is 2**14 bytes == 2**11 slots.  */
-#define IA64_GUEST_CONTEXT_RBS_OFFSET 448
+        unsigned int rbs_voff;
         unsigned long rbs[2048];
         unsigned long rbs_nat;
+        unsigned long rbs_rnat;
 };
 
 struct vcpu_guest_context {

diff --git a/xen/include/public/foreign/reference.size b/xen/include/public/foreign/reference.size
index a157136818180feb9da4dd693a3e4b797c49dd4a..d2c42d74f9fcc1191aeacf8fe2da72fdb4d3d77e 100644 (file)
--- a/xen/include/public/foreign/reference.size
+++ b/xen/include/public/foreign/reference.size
@@ -8,8 +8,8 @@ cpu_user_regs             |      68     200     496
 xen_ia64_boot_param       |       -       -      96
 ia64_tr_entry             |       -       -      32
 vcpu_tr_regs              |       -       -     512
-vcpu_guest_context_regs   |       -       -   21872
-vcpu_guest_context        |    2800    5168   21904
+vcpu_guest_context_regs   |       -       -   21904
+vcpu_guest_context        |    2800    5168   21936
 arch_vcpu_info            |      24      16       0
 vcpu_time_info            |      32      32      32
 vcpu_info                 |      64      64      48